Model checking methodology for verification of safety logics

Reference:

Janne Valkonen, Kim Björkman, Juho Frits, and Ilkka Niemelä. Model checking methodology for verification of safety logics. In Proceedings of the 6th International Conference on Safety of Industrial Automated Systems, SIAS 2010, Tampere, Finland, June 2010.

Abstract:

Verification of safety critical digital instrumentation and control (I&C) systems is challenging because of more and more complicated control functions enabled by programmable logic controllers. Design verification is an important task in the design flow because it enables to detect design errors earlier and helps to avoid expensive redesign and reimplementation work caused by undetected design errors found later. Systems have been typically verified by testing and simulation techniques. Both approaches have their advantages and are useful in many situations but in cases where exhaustive verification with reasonable effort and time is needed, none of them alone is suitable. Model checking is a computer-aided formal method that can be used for verifying correct functioning of a system design model. In model checking the task is to determine whether a model of a system satisfies a given requirement, which is checked against all executions of the system model. In addition to introducing the model checking methodology, this paper gives examples of industrial cases where model checking has been successfully used and discusses its applicability to verifying safety logic designs.

Keywords:

model checking, verification, safety logic, digital I&C

Suggested BibTeX entry:

@inproceedings{Valkonen.etal:SIAS2010,
    address = {Tampere, Finland},
    author = {Janne Valkonen and Kim Bj{\"o}rkman and Juho Frits and Ilkka Niemel{\"a}},
    booktitle = {Proceedings of the 6th International Conference on Safety of Industrial Automated Systems, SIAS 2010},
    month = {June},
    title = {Model checking methodology for verification of safety logics},
    year = {2010},
}